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        Wireless IC Design with SoC and Low Power Techniques
(應用SOC及低功耗技術的無線IC設計)
   入學要求

        學員學習本課程應具備下列基礎知識:
        ◆ 電路系統的基本概念。

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       堅持小班授課,為保證培訓效果,增加互動環節,每期人數限3到5人。
   上課時間和地點
上課地點:【上海】:同濟大學(滬西)/新城金郡商務樓(11號線白銀路站) 【深圳分部】:電影大廈(地鐵一號線大劇院站)/深圳大學成教院 【北京分部】:北京中山/福鑫大樓 【南京分部】:金港大廈(和燕路) 【武漢分部】:佳源大廈(高新二路) 【成都分部】:領館區1號(中和大道) 【沈陽分部】:沈陽理工大學/六宅臻品 【鄭州分部】:鄭州大學/錦華大廈 【石家莊分部】:河北科技大學/瑞景大廈 【廣州分部】:廣糧大廈 【西安分部】:協同大廈
近開課時間(周末班/連續班/晚班)
無線IC設計培訓班:2025年7月14日..用心服務..........--即將開課--...............................(歡迎您垂詢,視教育質量為生命!)
   實驗設備
     ☆資深工程師授課

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   質量保障

        1、培訓過程中,如有部分內容理解不透或消化不好,可免費在以后培訓班中重聽;
        2、課程完成后,授課老師留給學員手機和Email,保障培訓效果,免費提供半年的技術支持。
        3、培訓合格學員可享受免費推薦就業機會。

          應用SOC及低功耗技術的無線IC設計培訓班
  • SOC的設計方法與實現
  • 低功耗電路的特殊設計
  • 各種運算電路、濾波電路的設計考量
  • 調制解調電路的算法與設計
  • 傅利葉變換電路的設計技巧

第一部分 - Introduction

  1. What is SoC? and why is it important for Wireless, why not use a DSP?
  2. Impact and examples of applications
  3. Tools and metrics for analysis of performance, cost and power.
  4. Impact on memory subsystem
  5. Exploration of architectural space and alternatives
  6. Design choices (algorithm mappings), pipelining v/s concurrent, test methodology
  7. Components of a wireless modem

Assignment: Analyzing requirements for a balanced design from a system perspective

第二部分 - Arithmetic Building Blocks and Fixed Point Arithmetic

  1. Representations and notations
  2. Fixed point arithmetic v/s floating point
  3. Adders:? RCA, CLA, CSA
  4. Multiplier designs: Booth recoding and low power implications
  5. Array multipliers using counters, impact on layout.? Pipelined designs.
  6. Modeling of finite register length effects
  7. Block floating point representations and Dynamic range
  8. High performance, low power arithmetic blocks
  9. Lab: verilog and synthesis of diff arithmetic blocks, +, *. Compare area v/s speed v/s power

第三部分 - Digital Filters

  1. Types of filters and their applications, decimation /interpolation.
  2. Spectral requirements, channel equalization and? inter symbol interference
  3. FIR filters
  4. IIR filters, numerical stability issues. Implications of pipelined performance of multipliers on IIR filters.
  5. Adaptive filters, Decision feedback equalizer
  6. Design and test tradeoffs
  7. Examples of High performance, low power? ???design and implementations
  8. Lab: Design filters (FIR, IIR, adaptive filters) for different constraints

第四部分 - Coding and Forward Error Correction

?
    ? ?
  1. Forward error correction and it’s application in wireless modems
  2. ?
  3. Convolutional coding and decoding (Viterbi algorithm)
  4. ?
  5. Trellis coding (if time permits)
  6. ?
  7. Turbo-coding and decoding
  8. ?
  9. Design tradeoffs, ACS units, memory addressing schemes, scaling/wraparound, pipelining
  10. ?
  11. Examples of high performance systolic design, low power designs and implementations
  12. ?
  13. Lab: Design a viterbi decoder for a convolutional for 3G standard, implement a scaled down version of it.
  14. ?
?

第五部分 - Transforms – Fourier Transforms

  1. Applications : OFDM modulation in wireless systems (used in 802.11a and 802.11g)
  2. Discrete Fourier transform
  3. Applications
    1. Decomposition and the Fast Fourier Transform
    2. Variants and mixed radix transforms
    3. Memory architectures, addressing schemes, block floating point, pipelining
  4. Testing - Design of a FT block.
    1. High performance, low latency
    2. High performance, high throughput
    3. Programable
    4. Reconfigurable

Lab: Design and implement a butterfly unit, build a 16 point pipelined FFT block. Synthesize and analyze the timing and determine pipelining. Understand the contributions of the different components to gate count and power consumption.

第六部分 - System Design – Case Study

  1. The design of a communications system
    1. XDSL
    2. Wireless modem
  2. The implications of the various tradeoff.
  3. System constraints include multichannel, high performance design, single channel low power design, etc.
  4. Lab: Catchup

 

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